Intern - DRAM Test Structure Design and Layout Engineering

Micron Technology
Boise, Idaho, United StatesPosted Sep 6, 2026

About the role

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is seeking a highly motivated Engineering Intern to join the DRAM Build Enablement and Test Structure Engineering team. You will have the outstanding opportunity to contribute to the development, layout, verification, and analysis of semiconductor test structures used to characterize advanced DRAM technologies. This position offers hands-on experience with industry-leading EDA tools, physical build methodologies, composition rule verification, and silicon evaluation techniques used in next-generation memory development.

Responsibilities

Contribute to the development and arrangement of semiconductor test structures (TEGs) for advanced DRAM technology nodes. Support physical verification activities, including DRC, LVS, and predefined validation. Engage in semiconductor device, process, and test-structure simulation activities to evaluate build assumptions, predict electrical behavior, and correlate simulation results with silicon characterization data. Develop and analyze test structures for device characterization, process monitoring, and technology qualification. Apply layout databases and EDA tools to build, modify, and verify composed data. Perform data analysis on electrical characterization results and generate technical reports. Write automation scripts in Python, Tcl, or related programming languages to increase engineering efficiency. Explore AI-assisted and AI-augmented engineering workflows, including the responsible use of large language models (LLMs) to support automation, documentation, data analysis, and productivity improvement. Collaborate with technology development, process integration, device engineering, and characterization teams t

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