Layout Automation Developer Intern - 993

We are seeking a Layout Automation Engineering Intern in our Brooklyn Park, MN location. This internship will explore solutions that will help us automate and accelerate our physical layout of ion traps and related chips. This position will perform a capability assessment and work with the team to develop test cases to demonstrate new capabilities as well as identify gaps where solutions are needed. \n

Key Responsibilities

Explore Layout automation tools and workflows that can potentially speed up our ion trap layout process. Perform a trade study and develop use cases to demonstrate improvements. Work with the layout team to Develop Python and SKILL based automation tools and verify their effectiveness for ion trap layout Help with smaller, R&D layout projects whenever possible, and become familiar with our design through tapeout process

YOU MUST HAVE

Currently enrolled and pursuing undergraduate or graduate degree with graduation date on/after 2027 Due to Contractual requirements, must be a U.S. Person. defined as, U.S. citizen permanent resident or green card holder, workers granted asylum or refugee status Due to national security requirements imposed by the U.S. Government, candidates for this position must not be a People's Republic of China national or Russian national unless the candidate is also a U.S. citizen.

WE VALUE

3+ years computer programming experience in Python, C/C++, Cadence SKILL scripting, TCL/TK or other programming languages strongly preferred Exposure to EDA/CAD-based tools and methodologies preferred Currently pursuing a Masters in electrical engineering, physics, mathematics or computer science preferred Experience performing semiconductor or MEMS photolithography mask layout using Cadence Cadence Virtuoso, L-Edit, k-layout or Synopsis tools Hierarchal physical layout design practices Experience in automation, machine learning and generative AI tools for programming and workflow development Experience with layout of electronic, ph