Ph.D. Intern - Analog, Mixed Signal & Circuit Design
Marvell TechnologyAbout the role
About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Every time a hyperscaler trains a frontier AI model, streams a zettabyte of data across a data center fabric, or pushes a coherent optical signal across a transoceanic link, analog and mixed-signal circuits are doing the work that makes it possible. At Marvell, our analog design team is the reason those circuits exist. The custom XPUs, the 224G and 448G SerDes IP, the Silicon Photonics light engines, the co-packaged optics platforms powering the world's largest AI infrastructure — none of it ships without the analog IP this team designs from scratch. This is one of the few places in the industry where analog engineers work at the true physical limit of what silicon can do, on problems at and beyond 448G that have no established design playbook and no known solutions — open research questions that require exactly the kind of rigorous, first-principles thinking a Ph.D. program is built to develop.
Our Ph.D. Intern Program embeds doctoral candidates directly inside active design teams, working alongside staff and distinguished engineers on production IP and research-stage silicon. Projects are selected because they sit at the intersection of Marvell's most pressing engineering challenges and the circuit theory, device physics, and signal processing that define doctoral research in electrical engineering. Interns work through the complete design flow and participate in a structured analog design c
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